/*
 * This file is subject to the terms and conditions of the
 * Open Software License. 
 * See http://www.opensource.org/licenses/osl-2.0.php for more details.
 *
 * Copyright (C) 2003 gluk
 * Copyright (C) 2003-2013 Elvees, Inc.
 */

#include <multicore.h>

#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/uio_driver.h>

#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/irq.h>
#include <asm/dma.h>
#include <asm/serial.h>
#include <asm/mipsregs.h>
#include <asm/time.h>
#include <asm/traps.h>

#include "resources.c"


#if defined(CONFIG_MULTICORE_DSP)
static struct uio_info dsp_platform_data = {
    .name = "DSP",
    .version = "1.0",
    .irq = IRQ_DSP,
};

static struct platform_device dsp_device = {
    .name   = "uio_pdrv_genirq",
    .id     = 0,
    .dev    = {
        .platform_data	= &dsp_platform_data,
    },
    .resource       = dsp_resources,
    .num_resources  = ARRAY_SIZE(dsp_resources),
};
#endif

void __init plat_time_init(void)
{
}

int __init add_serial_port(unsigned int ubase, unsigned int irq, int n)
{
    struct uart_port s;
    memset(&s, 0, sizeof(s));

    s.line = n;
    s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
    s.iotype = UPIO_MEM32;
    s.uartclk = mips_hpt_frequency;
    s.regshift = 2;
    s.membase = (char *)(ubase);
    s.mapbase = ubase;
    s.irq = irq;

    if (early_serial_setup(&s) != 0)
    {
        printk(KERN_ERR "UART %01d (%08x) setup failed!\n", n, ubase);
        return 1;
    }
    else
        return 0;

}

int __init init_serial(void)
{
    int retcode = 0;

#if defined (CONFIG_MCT02R)
    retcode |= add_serial_port(MC_UART0_BASE,IRQ_UART0,0);
    retcode |= add_serial_port(MC_UART1_BASE,IRQ_UART1,1);
    retcode |= add_serial_port(MC_UART2_BASE,IRQ_UART2,2);
    retcode |= add_serial_port(MC_UART3_BASE,IRQ_UART3,3);
#elif defined(CONFIG_MCT03P)
    retcode |= add_serial_port(MC_UART0_BASE,IRQ_UART0,0);
    retcode |= add_serial_port(MC_UART1_BASE,IRQ_UART1,1);
#elif defined(CONFIG_NVCOM01) || defined(CONFIG_NVCOM02) || defined(CONFIG_MC30SF6)
    retcode |= add_serial_port(MC_UART0_BASE,IRQ_UART0,0);
    retcode |= add_serial_port(MC_UART1_BASE,IRQ_UART1,1);
#elif defined(CONFIG_MC24R2) || defined(CONFIG_MC24M) || defined(CONFIG_MCT06) || defined(CONFIG_MC0428)
    retcode |= add_serial_port(MC_UART0_BASE,IRQ_UART0,0);
#elif defined(CONFIG_MCT04)
    retcode |= add_serial_port(MC_UART0_BASE,IRQ_UART,0);
#else
    retcode |= add_serial_port(MC_UART0_BASE,IRQ_UTRx, 0);
#endif
    return 0;
}

void __init plat_mem_setup(void)
{
    u_int32_t freq_mult;

    freq_mult = mc_frequency_multiplier();
    mips_hpt_frequency = MC_QUARTZ_CLOCK_FREQ * freq_mult;

    printk("MIPS  clk frequency: %d MHz, frequency multiplier: %d\n", 
        mips_hpt_frequency / 1000000, freq_mult);
    printk("MPORT clk frequency: %d MHz, frequency multiplier: %d\n",
        (MC_QUARTZ_CLOCK_FREQ * mc_frequency_mport_multiplier() / 1000000), 
        mc_frequency_mport_multiplier());

    _machine_restart = NULL;
    _machine_halt = NULL;
    pm_power_off = NULL;

    init_serial();
    
    printk(KERN_INFO "Multicore specific initialisation complete\n");
}

static int __init mc_late_setup(void)
{
#if	defined(CONFIG_MCT06)
#if defined(CONFIG_MULTICORE_MFBSP0_SPI)
    platform_device_register_simple("mc_spi", 0, mfbsp_resources[0],
        ARRAY_SIZE(mfbsp_resources[0]));
#elif defined(CONFIG_MULTICORE_MFBSP0_LPORT)
    platform_device_register_simple("mc_lport", 0, mfbsp_resources[0],
        ARRAY_SIZE(mfbsp_resources[0]));
#elif defined(CONFIG_MULTICORE_MFBSP0_I2S)
    platform_device_register_simple("mc_i2s", 0, mfbsp_resources[0],
        ARRAY_SIZE(mfbsp_resources[0]));
    platform_device_register_simple("multicore-audio", 0,
        mfbsp_resources[0], ARRAY_SIZE(mfbsp_resources[0]));
#endif

#if defined(CONFIG_MULTICORE_MFBSP1_SPI)
    platform_device_register_simple("mc_spi", 1, mfbsp_resources[1],
        ARRAY_SIZE(mfbsp_resources[1]));
#elif defined(CONFIG_MULTICORE_MFBSP1_LPORT)
    platform_device_register_simple("mc_lport", 1, mfbsp_resources[1],
        ARRAY_SIZE(mfbsp_resources[1]));
#elif defined(CONFIG_MULTICORE_MFBSP1_I2S)
    platform_device_register_simple("mc_i2s", 1, mfbsp_resources[1],
        ARRAY_SIZE(mfbsp_resources[1]));
    platform_device_register_simple("multicore-audio", 1,
        mfbsp_resources[1], ARRAY_SIZE(mfbsp_resources[1]));
#endif
#else

#if defined(CONFIG_MULTICORE_MFBSP0_SPI)
    platform_device_register_simple("mc_spi", 0, mfbsp_resources[0], 
        ARRAY_SIZE(mfbsp_resources[0]));
#elif defined(CONFIG_MULTICORE_MFBSP0_LPORT)
    platform_device_register_simple("mc_lport", 0, mfbsp_resources[0], 
        ARRAY_SIZE(mfbsp_resources[0]));
#elif defined(CONFIG_MULTICORE_MFBSP0_I2S)
    platform_device_register_simple("mc_i2s", 0, mfbsp_resources[0], 
        ARRAY_SIZE(mfbsp_resources[0]));
    platform_device_register_simple("multicore-audio", 0, 
        mfbsp_resources[0], ARRAY_SIZE(mfbsp_resources[0]));
#endif

#if defined(CONFIG_MULTICORE_MFBSP1_SPI)
    platform_device_register_simple("mc_spi", 1, mfbsp_resources[1], 
        ARRAY_SIZE(mfbsp_resources[1]));
#elif defined(CONFIG_MULTICORE_MFBSP1_LPORT)
    platform_device_register_simple("mc_lport", 1, mfbsp_resources[1], 
        ARRAY_SIZE(mfbsp_resources[1]));
#elif defined(CONFIG_MULTICORE_MFBSP1_I2S)
    platform_device_register_simple("mc_i2s", 1, mfbsp_resources[1], 
        ARRAY_SIZE(mfbsp_resources[1]));
    platform_device_register_simple("multicore-audio", 1, 
        mfbsp_resources[1], ARRAY_SIZE(mfbsp_resources[1]));
#endif

#if defined(CONFIG_MULTICORE_MFBSP2_SPI)
    platform_device_register_simple("mc_spi", 2, mfbsp_resources[2], 
        ARRAY_SIZE(mfbsp_resources[2]));
#elif defined(CONFIG_MULTICORE_MFBSP2_LPORT)
    platform_device_register_simple("mc_lport", 2, mfbsp_resources[2], 
        ARRAY_SIZE(mfbsp_resources[2]));
#elif defined(CONFIG_MULTICORE_MFBSP2_I2S)
    platform_device_register_simple("mc_i2s", 2, mfbsp_resources[2], 
        ARRAY_SIZE(mfbsp_resources[2]));
    platform_device_register_simple("multicore-audio", 2, 
        mfbsp_resources[2], ARRAY_SIZE(mfbsp_resources[2]));
#endif

#if defined(CONFIG_MULTICORE_MFBSP3_SPI)
    platform_device_register_simple("mc_spi", 3, mfbsp_resources[3], 
        ARRAY_SIZE(mfbsp_resources[3]));
#elif defined(CONFIG_MULTICORE_MFBSP3_LPORT)
    platform_device_register_simple("mc_lport", 3, mfbsp_resources[3], 
        ARRAY_SIZE(mfbsp_resources[3]));
#elif defined(CONFIG_MULTICORE_MFBSP3_I2S)
    platform_device_register_simple("mc_i2s", 3, mfbsp_resources[3], 
        ARRAY_SIZE(mfbsp_resources[3]));
    platform_device_register_simple("multicore-audio", 3, 
        mfbsp_resources[3], ARRAY_SIZE(mfbsp_resources[3]));
#endif
#endif

#if defined(CONFIG_MULTICORE_I2C)
    platform_device_register_simple("mc_i2c", 0, i2c_resources,
        ARRAY_SIZE(i2c_resources));
#endif
      
#if defined(CONFIG_MULTICORE_ETH)
    platform_device_register_simple("mc_eth", 0, eth_resources,
        ARRAY_SIZE(eth_resources));
#endif

#if defined(CONFIG_MULTICORE_DSP)
    platform_device_register(&dsp_device);
    MC_CLKEN |= MC_CLKEN_DSP0 | MC_CLKEN_DSP1;
    MC_CRPLL |= MC_CRPLL_DSP | MC_CRPLL_CLKSEL_DSP(
        CONFIG_MULTICORE_DSP_FREQ * 2 / CONFIG_MULTICORE_CLOCKFREQ);
#endif

    return 0;
}

void mc_wait(void)
{
    asm volatile (
        "   nop\n"
        "   nop\n");
#if defined(CONFIG_MCT04)||defined(CONFIG_MC30SF6)||defined(CONFIG_MCT06)||defined(CONFIG_MC0428)
    ////	????		TODO
    //MC_CRPLL &= ~MC_CRPLL_PLL_CORE_EN;
    //MC_CLKEN &= ~(MC_CLKEN_CPU1);
    MC_CRPLL &= 0xFFFFFF80;	//	set PPL_CORE = (XTI / (2 * 16))
#else
    MC_CLKEN &= ~MC_CLKEN_CPU;
#endif
    asm volatile (
        "   nop\n"
        "   nop\n");
}

postcore_initcall(mc_late_setup);