/*
 * This file is subject to the terms and conditions of the
 * Open Software License. 
 * See http://www.opensource.org/licenses/osl-2.0.php for more details.
 *
 * Copyright (C) 2003 gluk
 * Copyright (C) 2003-2011 Elvees, Inc.
 */

#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>

#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <multicore.h>

const char *get_system_type(void)
{
        return "Elvis MultiCore";
}

void __init prom_free_prom_memory(void)
{
	return;
}

void __init prom_init(void)
{
	mips_machtype = MACH_MULTICORE;

	add_memory_region(0x0, MC_MEMSIZE, BOOT_MEM_RAM);
	//add_memory_region(0x0, 0x1000000, BOOT_MEM_RAM);
	//add_memory_region(0x40000000, MC_MEMSIZE, BOOT_MEM_RAM);

        /* flush CPU caches */
#ifdef CONFIG_MCT04
	MC_CSR0 |= MC_CSR_FLUSH_I;
	MC_CSR0 |= MC_CSR_FLUSH_D;
	//MC_CSR1 |= MC_CSR_FLUSH_I;	TODO
	//MC_CSR1 |= MC_CSR_FLUSH_D;	TODO
#else
#if defined(CONFIG_MC24)
	MC_CSR |= MC_CSR_FLUSH_I;
#else
	MC_CSR |= MC_CSR_FLUSH_I;
	MC_CSR |= MC_CSR_FLUSH_D;
#endif
#endif

#ifdef CONFIG_MCT04
	MC_CSR0 &= ~MC_CSR_FM;	/* enable TLB mode */
	//MC_CSR1 &= ~MC_CSR_FM;	/* enable TLB mode */	TODO
#else
	MC_CSR &= ~MC_CSR_FM;	/* enable TLB mode */
#endif
}