/* * This file is subject to the terms and conditions of the * Open Software License. * See http://www.opensource.org/licenses/osl-2.0.php for more details. * * Copyright (C) 2011 Elvees, Inc. */ #ifndef _MULTICORE_H #define _MULTICORE_H #include #if defined(CONFIG_NVCOM01) || defined(CONFIG_NVCOM02) || \ defined(CONFIG_MCT03P) || defined(CONFIG_MC30SF6) || defined(CONFIG_MCT04) || defined(CONFIG_MCT06) || defined(CONFIG_MC0428) #define MC_QUARTZ_CLOCK_FREQ ((CONFIG_MULTICORE_CLOCKFREQ * 1000000) / 2) #else #define MC_QUARTZ_CLOCK_FREQ (CONFIG_MULTICORE_CLOCKFREQ * 1000000) #endif #define MC_MEMSIZE (1048576 * CONFIG_MULTICORE_MEMORY) #include #ifdef CONFIG_NVCOM01 # include "io-nvcom01.h" #endif #ifdef CONFIG_NVCOM02 # include "io-nvcom02.h" #endif #ifdef CONFIG_MC24 # include "io-mc24.h" #endif #ifdef CONFIG_MC24R2 # include "io-mc24r2.h" #endif #ifdef CONFIG_MC24M # include "io-mc24m.h" #endif #if defined(CONFIG_MCT02R) || defined(CONFIG_MCT03P) # include "io-mct02.h" #endif #if defined(CONFIG_MC30SF6) # include "io-mc30sf6.h" #endif #if defined(CONFIG_MCT04) # include "io-mct04.h" #endif #if defined(CONFIG_MCT06) # include "io-mct06.h" #endif #if defined(CONFIG_MC0428) # include "io-mc0428.h" #endif #include "io-elvees.h" #if defined(CONFIG_NVCOM01) || defined(CONFIG_NVCOM02) # define CSR_CLKMASK 0xff # define CSR_CLKSHIFT 0x0 #elif defined(CONFIG_MC24M) # define CSR_CLKMASK 0x7f # define CSR_CLKSHIFT 0x0 #elif defined(CONFIG_MC24R2) # define CSR_CLKMASK 0x1f # define CSR_CLKSHIFT 0x0 #elif defined(CONFIG_MCT02R) # define CSR_CLKMASK 0x1f # define CSR_CLKSHIFT 0x0 #elif defined(CONFIG_MCT03P) # define CSR_CLKMASK 0x3f # define CSR_CLKSHIFT 0x0 #elif defined(CONFIG_MC30SF6) || defined(CONFIG_MCT04) || defined(CONFIG_MCT06) || defined(CONFIG_MC0428) # define CSR_CLKMASK 0x7f # define CSR_CLKSHIFT 0x0 #else # define CSR_CLKMASK 0x1f0 # define CSR_CLKSHIFT 4 #endif #define mc_frequency_multiplier() ((MC_CRPLL & CSR_CLKMASK) >> CSR_CLKSHIFT) #if defined(CONFIG_NVCOM01) || defined(CONFIG_NVCOM02) # define CR_PLL_MPORTMASK 0x0000ff00 # define CR_PLL_MPORTSHIFT 8 #elif defined(CONFIG_MC24M) # define CR_PLL_MPORTMASK 0x00007f00 # define CR_PLL_MPORTSHIFT 8 #elif defined(CONFIG_MC24R2) # define CR_PLL_MPORTMASK 0x00001f00 # define CR_PLL_MPORTSHIFT 8 #elif defined(CONFIG_MCT02R) # define CR_PLL_MPORTMASK 0x00001f00 # define CR_PLL_MPORTSHIFT 8 #elif defined(CONFIG_MCT03P) || defined(CONFIG_MC30SF6) || defined(CONFIG_MCT06) || defined(CONFIG_MC0428) # define CR_PLL_MPORTMASK 0x00007f00 # define CR_PLL_MPORTSHIFT 8 #elif defined(CONFIG_MCT04) # define CR_PLL_MPORTMASK 0x00000000 # define CR_PLL_MPORTSHIFT 0 #else # define CR_PLL_MPORTMASK 0x0000ff00 # define CR_PLL_MPORTSHIFT 8 #endif #define mc_frequency_mport_multiplier() ((MC_CRPLL & CR_PLL_MPORTMASK) >> CR_PLL_MPORTSHIFT) /* Debug messaging */ #undef PDEBUG #ifdef MULTICORE_DEBUG # define PDEBUG(fmt, args...) printk(KERN_ALERT "elvees: " fmt, ##args) #else # define PDEBUG(fmt, args...) /* not debugging: nothing */ #endif #undef PDEBUGG #define PDEBUGG(fmt, args...) /* nothing: it's a placeholder */ extern struct bus_type mcbus; extern u64 mcbus_dma_mask; /* * Map virtual address to physical address. */ static inline unsigned mips_virt_to_phys (unsigned virtaddr) { switch (virtaddr >> 28 & 0xE) { default: return virtaddr + 0x40000000; /* kuseg */ case 0x8: return virtaddr - 0x80000000; /* kseg0 */ case 0xA: return virtaddr - 0xA0000000; /* kseg1 */ case 0xC: return virtaddr; /* kseg2 */ case 0xE: return virtaddr; /* kseg3 */ } } #endif /* _MULTICORE_H */