/* Memory sub-system initialization code */ #include #include #include .text .set noreorder .set mips32 .globl lowlevel_init lowlevel_init: /* * Step 2) Establish Status Register * (set BEV, clear ERL, clear EXL, clear IE) */ li t1, 0x00400000 mtc0 t1, CP0_STATUS /* * Step 3) Establish CP0 Config0 * (set K0=3) */ li t1, 0x00000003 mtc0 t1, CP0_CONFIG /* * Step 7) Establish Cause * (set IV bit) */ # li t1, 0x00800000 # mtc0 t1, CP0_CAUSE /* Establish Wired (and Random) */ mtc0 zero, CP0_WIRED nop ####################################################### # TODO!!! /* init system PLL & clocks */ la v1, ELVEES_SYSTEM move v0, zero ori v0, ((CONFIG_SYS_MHZ / 5) & 0x00FF) #ifdef MPORT_FRQ ori v0, (((MPORT_FRQ / 5) & 0x00FF) << 8) #endif sw v0, 0(v1) #li v0, 0xFFFFFFFF li v0, 0x001FFFFF sw v0, 4(v1) ####################################################### jr ra nop