#include int main (void) { /* Configure 16 Mbyte of external Flash memory at nCS3. */ MC_CSCON3 = MC_CSCON_WS (3); /* Wait states */ /* Configure 64 Mbytes of external 32-bit SDRAM memory at nCS0. */ MC_CSCON0 = MC_CSCON_E | /* Enable nCS0 */ MC_CSCON_WS (0) | /* Wait states */ MC_CSCON_T | /* Sync memory */ MC_CSCON_CSBA (0x00000000) | /* Base address */ MC_CSCON_CSMASK (0xF8000000); /* Address mask */ MC_SDRCON = MC_SDRCON_PS_512 | /* Page size 512 */ MC_SDRCON_CL_3 | /* CAS latency 3 cycles */ MC_SDRCON_RFR (64000000/8192, MPORT_KHZ); /* Refresh period */ MC_SDRTMR = MC_SDRTMR_TWR(2) | /* Write recovery delay */ MC_SDRTMR_TRP(2) | /* Минимальный период Precharge */ MC_SDRTMR_TRCD(2) | /* Между Active и Read/Write */ MC_SDRTMR_TRAS(5) | /* Между * Active и Precharge */ MC_SDRTMR_TRFC(15); /* Интервал между Refresh */ MC_SDRCSR = 1; /* Initialize SDRAM */ udelay (2); typedef void (*linux_entry) (void); linux_entry entry = (linux_entry) (0xa0000400); entry(); return 0; } void _irq_handler_ () { /* uos_halt (0);*/ }